As scaling for conventional CMOS integrated circuits approaches quantum mechanical limits, alternative nanostructures and materials have been investigated in the semiconductor industry. Of such nanostructures and materials, carbon nanotubes (CNTs) offer excellent intrinsic properties that are suitable for high performance nanoscale devices.
A key advantage of CNTs over conventional CMOS devices is that scaling limitations of MOSFETs due to boundary scattering of electrons from imperfect interfaces are solved naturally in CNTs which have a smooth, well coordinated graphene structure with no bonds to the outside. This enables CNTs to retain excellent transport properties to much smaller lateral dimensions than silicon. The small radius and possibility of completely surrounding the CNT by a gate provide excellent electrostatic confinement of channel electrons, enabling the channel length to be scaled down to very small dimensions, and their small size would enable high packing densities. Band structure calculations of CNTs according to P. Avouris and J. Chen, “Nanotube electronics and optoelectronics,” Materials Today, Vol. 9, pp. 46-54, (2006) show that conduction and valence bands are mirror images of each other, i.e., both electrons and holes should share equally good transport properties. This indicates suitability of CNTs for a general-purpose high-performance complementary circuit technology.
As is now well known, CNTs can be either metallic or semimetallic, depending on their chirality and have a bandgap which is inversely proportional to their diameter for the semiconducting tubes. A useful relation, derived from tight binding calculations, between the diameter and the band gap, Eg of a CNT isEg=γ(2dC—C/√{square root over (3)}dCNT),  equation (1)where γ is the hopping matrix element, C—C is the C—C bond distance, and dCNT is the diameter of the carbon nanotube. Inclusion of electron-electron interactions raises the size of the bandgap, Eg significantly. For a 1 nm nanotube, the band gap is roughly 1 eV. The best transport measurements and device characteristics have been obtained on rather large diameter nanotubes, with their diameter in the 1.7-3 nm range. The idealized electron/hole dispersion relation is hyperbolic in shape, with a quasi parabolic “effective mass” regime at lower energies and a linear “constant velocity” regime at higher energies, where the limiting velocity, vlim, is 5˜10×107 cm/sec according to G. Pennington and N. Goldsman, “Semiclassical transport and phonon scattering of electrons in semiconducting carbon nanotubes,” Phys. Rev. B 68, 045426 (2003).
P. Avouris et al, “Carbon Nanotube Electronics,” Proceedings of the IEEE, Vol. 91, No. 11, pp. 1772-1984, November (2003) discloses carbon nanotube field effect transistors, and compares the performance characteristics of the carbon nanotube field effect transistors with the performance characteristics of silicon based field effect transistors. Further, methods of forming carbon nanotube base integrated circuits are also disclosed.
One application of a carbon nanotube is formation of a switching device employing the carbon nanotube in a field effect transistor structure. FIG. 1 shows a vertical cross-sectional view of an exemplary carbon nanotube field effect transistor according to P. Avouris et al. along a lengthwise direction of the carbon nanotube 130. The exemplary carbon nanotube field effect transistor includes a back gate dielectric layer 120 comprising silicon oxide, a back gate electrode 112 formed in a semiconductor substrate 110, and source and drain metal contacts 140. Optionally, a top gate dielectric layer (not shown) and a top gate electrode (not shown) may be additionally formed to control conduction of current along the carbon nanotube. The exemplary semiconductor device functions as an electronic switch in the same manner as a semiconductor based field effect transistor.
Multiwalled carbon nanotubes, which contain multiple concentric carbon nanotubes having different diameters, are also known in the art. FIG. 2 shows a model of a double wall carbon nanotube structure including an inner carbon nanotube and an outer carbon nanotube. When the distance between the inner nanotube and the outer nanotube is an atomic scale dimension, intershell electron transport occurs. Further, the intershell electron transport in multiwall carbon nanotubes having a wall-to-wall distance of about 0.3 nm have shown quantum conductance behavior. B. Bourlon et al., “Determination of the Intershell Conductance in Multiwalled Carbon Nanotubes,” Phys. Rev. Letters, Vol. 93, No. 17, pp. 176806-1˜176806-4, October (2004) disclose that the intershell transport is tunnel type and that measured intershell transmission is consistent with estimations based on the overlap between π-orbitals and neighboring shells.
Another application of a carbon nanotube is its use as a tip of a scanning electron microscope. P. Liu et al., “Peeling and Cutting a Multi-Walled Carbon Nanotube inside a Scanning Electron Microscope,” Proc. of the 2nd IEEE International Conference on Nano/Micro Engineered and Molecular Systems, pp. 286-289, January (2007) discloses a method of employing an electron beam to cut individual shells, or individual carbon nanotubes, to fabricate a desired structure from a multiwall carbon nanotube structure including multiple concentric carbon nanotubes. FIG. 3 shows a tip for a scanning electron microscope that may be manufactured by the methods disclosed by P. Liu et al.
While some prototype semiconductor devices employing carbon nanotubes have been proposed as described above, the variety of available semiconductor devices based on carbon nanotubes is limited. Particularly, functional semiconductor circuitry requires other functional components including memory devices that can store information.
In view of the above, there exists a need for a carbon nanotube based memory device to enable storage of information in a carbon nanotube based semiconductor circuit, and methods of manufacturing the same.